1. The Field of the Invention
The present invention relates to packaging of microelectronic components. More particularly, the present invention relates to improved dissipation of heat produced by microelectronic components. Additionally, the present invention relates to balancing a chip package against warpage stresses. In particular, the present invention relates to a unitary heat sink that functions as both as a die-attach paddle and an outer ring of a chip package for heat rejection that extends to the outer boundary of the chip package. In the unitary heat sink, at least one opening therein exists between the die-attach paddle and the outer boundary of the chip package.
2. The Relevant Technology
Microelectronic packages are routinely packaged in plastic molding compounds in order to reduce cost and facilitate packaging operations. Because microelectronic devices produce appreciable amounts of heat that must be removed from the device in order to ensure proper function thereof, the issue of heat removal has become increasingly important. Where the power rating of the microelectronic device becomes significantly high, plastic encapsulation usually will be replaced with either ceramic or metallic encapsulation to facilitate heat rejection. However, ceramic or metallic encapsulation is more expensive than plastic encapsulation.
A heat sink can be attached directly to a die to serve a dual function of a die-attach paddle and a heat sink. Conventional techniques have been developed to rigidly attach a heat sink to a lead frame for an integrated circuit. Several problems occur in chip packaging. One problem that occurs in using a composite heat sink is that disparities between coefficients of thermal expansion can cause destructive stresses in a package as the package cycles through heating and cooling.
As chip packaging technology follows the lead of microelectronic circuit design miniaturization, a goal is to miniaturize the chip package size to be substantially the same size as the chip itself. Lead on chip (LOC) technology allows leads to come directly to the microelectronic device without the need for wire bonding, thus, the chip package can have a smaller dimension.
FIGS. 1a and 1b illustrate a prior art method of heat management in which at least two problems exist. In FIG. 1a, a semiconductor package 10, depicted in a top plan view, illustrates LOC technology where a lead 12 makes direct contact to a chip 14 without a bonding wire. When viewed in the cross-section view of FIG. 1b, package 10 reveals a die attach 16 and outer structure 18 that are substantially parallel to each other and that are connected by any of various methods such as welding or adhesive bonding. As package 10 runs through thermal cycles, because of dissimilarities in coefficients of thermal expansion between die attach 16, adhesive bonding, if any, and outer structure 18, destructive stresses are caused. It can also be seen that die attach 16, outer structure 18, and any adhesive bonding material therebetween encapsulated in a packaging plastic 26 may have antagonistic abilities to withstand thermal stresses. A first thickness 20 of packaging plastic 26 above chip 14, and a second thickness 22 of packaging plastic 26 below die attach 16 may cause package 10 to be thermally unbalanced such that warpage and bowing may occur while in use. Although conductive heat flow into outer structure 18 may be substantial at the interface between die attach 16 and outer structure 18, ultimate heat rejection from package 10 is poor because outer structure 18 is substantially encapsulated in packaging plastic 26 and packaging plastic 26 acts as a heat flow resistor.
FIGS. 2a and 2b illustrate prior art attempts to substantially equilibrate dissimilar stresses in packaging plastic 26 by making first thickness 20 and second thickness 22 substantially similar. Die attach 16 is downset away from outer structure 18 by a downset 24 such that first thickness 20 and second thickness 22 are substantially similar. It can be seen, however, that a second heat sink 34, substantially externally exposed at the package lower edge 28, is insulated from die attach 16 and outer structure 18 by packaging plastic 26. Packaging plastic 26 acts as a thermal blanket and resists heat removal from chip 14. Packaging plastic 26 may be required to be injected from at least two separate injection ports when a package such as package 10 depicted in either of FIGS. 1b and 2b is being assembled. Because die attach 16 and outer structure 18 may substantially seal packaging plastic 26 in the region that forms first thickness 20 from packaging plastic 26 in the region that form second thickness 22, a dual- pressurized, dual injection-port plastic injection molding system may be needed to properly complete formation of the body of package 10.
FIG. 2c illustrates a cross-sectional view of an attempt to facilitate heat removal from chip 14 in which substantial downsetting of chip 14 to second heat sink 34 at package lower edge 28 is done wherein downset 24 extends downwardly substantially from the center line of package 10 to package lower edge 28. One problem with this structure is that first thickness 20 of packaging plastic 26 causes substantial unbalance such that warpage and bowing of package 10 is caused when package 10 is heated during ordinary use. Additionally, a two- or three-input injection-port molding technique is required.
What is needed in the art is a heat management structure that effectively conveys heat away from a microelectronic device without the problems that arise in the prior art.
More particularly, what is needed is a heat management structure that effectively rejects heat from a microelectronic device that avoids thermal stresses caused by dissimilarities in thermal conductivities of materials. What is also needed in the art is a method of forming a chip package comprising packaging plastic that simplifies injection molding techniques over the prior art. What is also needed in the art is a heat management structure that does not cause an unbalanced package to be formed such that warpage and bowing are substantially avoided.
The present invention relates to a heat management structure within a chip package that allows for heat rejection from a chip but that avoids the prior art problems of thermal stresses caused by dissimilar thermal conductivities of a heat management structure and of creating a thermally unbalanced package due to disparate distribution of packaging plastic.
In an embodiment of the present invention a package includes a chip, leads on a chip, a die attach, a downset, a packaging plastic, and an outer structure among others. The outer structure, downset, and die attach comprise a substantially unitary article that can be made by stamping, etching, ingot casting or metal powder molding or other such unitary-article forming processes known in the art.
The complete structure of the die attach, the downset, and the outer structure is preferably made from a single piece of material such as copper or a copper alloy. When the die attach, downset, and outer structure are made by stamping, the grain structure therein, after formation by stamping and the like, would have a substantially homogenous microscopic appearance in all locations except where the downset begins next to the die attach and where the downset ends next to the outer structure.
Achieving a balanced package that substantially resists warpage and bowing during ordinary manufacture and ordinary use in the life of the package is accomplished by balancing the packaging material width with the ability of the downset to resist warpage and bowing stresses. Specific selection of materials such as the packaging material and the metal that comprises the die attach, downset, and outer structure will depend upon the specific application. The downset forms a first angle approximately with the plane of the die attach if it is substantially planar, and a second angle approximately with the plane of the outer structure if it is substantially planar with each of the respective structures. The first angle is greater than 180 degrees and the second angle is less than 180 degrees.
A substantial portion of the outer structure is exposed to the external part of the package in the surface comprising the packaging lower edge.
It can now be appreciated that a unitary structure will avoid destructive thermal cycling stresses caused by disparate coefficients of thermal expansion that are inherent in dissimilar material composites.
The length and width of the die attach may be made to be larger than the chip, substantially the same size as the chip, or smaller than the chip. Selection of a preferred die attach length and/or die attach width can be made when a specific application is employed and the heat dissipation requirements of the heat sink unit are matched to the heat output of the chip. The actual size of the die attach to the size of the chip could be balanced between sufficient ability to act as a die attach to substantially secure the chip, to substantially resist warpage and bowing, and to have sufficient ability to allow the chip to reject heat to the outer structure. The number of occurrences of the downset for a given heat sink unit may be selected according to a particular application of the present invention.
In yet another embodiment of the present invention, the downset comprises a part of the external boundary of the package. Exposure of the downset to the external portion of the package allows for additional heat rejection from the chip in addition to the use of the outer structure. The downset forms a first angle with the plane of the die attach, and a second angle with the plane of the outer structure.
An example of forming a chip package is presented in which a unitary heat sink structure is provided that has a first side and a second side. The heat sink structure has at least one opening therein to communicate from the first side to the second side. An integrated circuit structure such as a chip is connected to the first side of the unitary heat sink structure to form an exposed integrated circuit package. A packaging material is next prepared, made flowable, and mobilized by transfer injection molding or the like. The packaging material may be selected from such materials as thermoset plastics and the like. The exposed integrated circuit package is next placed into a mold and encapsulated by packaging material, whereby the packaging material substantially covers above and to the sides of the integrated circuit structure, the packaging material substantially fills the at least one opening, and the packaging material substantially fills below the second side of the unitary heat sink structure. The packaging material flows from the first side through the at least one opening to the second side.
These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.